Top Tech Jobs & Startup Jobs in Los Angeles, CA

Reposted 10 Days AgoSaved
In-Office or Remote
CA, USA
10-10 Annually
Expert/Leader
10-10 Annually
Expert/Leader
Information Technology • Software
The SAP SuccessFactors & Payroll Technical Architect will design and manage technical architecture for HR transformation, focusing on integrations, extensions, and compliance.
Top Skills: APIsEccEcpIasIntegration CenterIpsMiddlewareQualtrics XmS4 HanaSap BtpSap CpiSap PayrollSap Successfactors
Reposted 12 Days AgoSaved
Remote
United States
Expert/Leader
Expert/Leader
Information Technology • Software
Lead SAP Finance workstreams for Product Costing and Material Ledger in S/4HANA. Design, configure, and implement Material Ledger, Actual Costing, UPA, and inventory valuation. Run workshops, perform fit-gap, drive design/configuration/testing/data migration/cutover, integrate across FI/CO/MM/PP/SD, and mentor junior consultants.
Top Skills: Central FinanceSap ActivateSap CoSap FiSap Group ReportingSap Material Ledger (Actual Costing)Sap MmSap PpSap Product Costing (Co-Pc)Sap S/4Hana FinanceSap SdUniversal Parallel Accounting (Upa)
15 Days AgoSaved
Remote
United States
Senior level
Senior level
Information Technology • Software
Lead architecture, implementation, verification, and debug of advanced DFT solutions for complex ASIC/SoC designs. Own scan insertion, ATPG, MBIST/LBIST, JTAG/boundary scan, silicon debug, post-silicon bring-up, and cross-functional resolution of critical silicon issues. Evaluate and adopt emerging DFT methodologies to improve quality and yield.
Top Skills: AsicAtpgBoundary ScanCadenceDftDrcJtagLbistLecLogical Equivalence CheckingMbistPhysical DesignPllsPost-Silicon DebugRtlScan Chain StitchingScan InsertionSiemens/MentorSilicon Bring-UpSocSsnSynopsysSynthesisTessent
17 Days AgoSaved
Remote
United States
Expert/Leader
Expert/Leader
Information Technology • Software
Lead ASIC DFT Engineer responsible for architecting, implementing, verifying, and debugging DFT solutions for complex ASIC/SoC designs. Own scan architecture, ATPG, MBIST/LBIST, JTAG/boundary-scan, post-silicon bring-up, failure analysis, and DFT timing/SDC. Collaborate across RTL, STA, physical design teams, mentor engineers, and develop automation scripts to improve DFT flows and debug productivity.
Top Skills: AsicAtpgBoundary-ScanCadenceDftDftmaxDiagnosysDrcIjtagJtagLbistLecMbistPattern PortingPattern RetargetingPerlPllsPsvPythonRtlScanSdcSdfSiemens/Mentor EdaSmsSsnSynopsysSynthesisTclTessentTetramaxTiming Simulations
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