Top Tech Jobs & Startup Jobs in Los Angeles, CA

Lead architecture and delivery of an ML infrastructure efficiency platform across silicon co-design teams. Define platform contracts, onboarding, orchestration, auth, observability, storage/caching, and SLA enforcement. Own production operation, security, reliability, and performance while mentoring engineers and driving cross-team technical decisions.

Lead HBM and LPDDR system integration and bringup for next-generation SoCs. Own memory performance, power, thermal, and reliability closure across silicon, package, board, and firmware. Drive post-silicon margining, VF shmoo, eye characterization, and correlation. Debug training, calibration, SI/PI, and system stability issues. Define validation, characterization, and issue-tracking plans to produce production-ready operating points.

The role involves owning physics models, defining manufacturing specifications, and validating designs to ensure product quality and performance. The architect will utilize first-principles thinking and AI to improve workflows and drive alignment across engineering teams.

Design and optimize custom SRAM circuits for performance, area, power, functionality, and robustness across advanced semiconductor processes. Collaborate with mask designers on dense pitch-matched layouts, verify electrical integrity, and improve design automation, data collection, and analysis flows. The role supports custom memory development for NVIDIA processing chips and requires strong SRAM design expertise, circuit design experience, and familiarity with semiconductor design and verification tools.

Lead and coach a storage production engineering team to design, deploy, and operate large-scale storage systems. Own capacity planning, lifecycle management, HA/disaster recovery, automation, monitoring, incident response, and partnerships with engineering and AI teams to improve data pipelines and performance.

Lead and grow an engineering team building GPU‑accelerated deep learning inference frameworks. Drive roadmap, collaborate with compiler/libraries/research teams, optimize LLM and multimodal model performance, and oversee multi‑GPU communications and production deployment of inference software.

Design and implement production-grade VLSI/EDA tools and methodologies for multi-die package design. Build flows, applications, and automation to construct, analyze, validate, and optimize package designs to accelerate tape-out and scale engineering teams.

Deploy, manage, validate, and optimize large-scale AI compute and HPC infrastructure in Linux environments. Serve as a technical liaison among NVIDIA, partners, and enterprise customers; lead planning through implementation, document handoffs, transfer knowledge, troubleshoot hardware and software, and provide feedback for product and architecture improvements. The role involves networking, system design, automation, benchmarking, cluster provisioning, and customer-site travel up to 30%.

Design and build RL post-training infrastructure for AI, optimizing training-inference-rollout on distributed systems while ensuring fault tolerance and scalability.

Lead hardware-software co-design for LLM inference: drive and document architecture, build executable C++ hardware models, optimize performance with good algorithms and parallelism, diagnose cross-team chip and subsystem issues, and automate workflows to improve efficiency.