Top Tech Jobs & Startup Jobs in Los Angeles, CA

Develop innovative physical design methodologies for GPUs and SOCs, focusing on PPA improvements and collaboration across multiple teams. Use AI/ML to enhance design efficiency.

Develop algorithms and optimizations for inference and compiler stack, enhance performance metrics, collaborate with hardware teams, and publish work on novel approaches.

The role involves architecting and operating NVIDIA's cloud-native attestation platform, developing high-availability services, collaborating with cross-functional teams, and mentoring engineers.

Design and implement an LLVM-based backend JIT compiler for NVIDIA GPUs. Develop compiler passes and optimizations, focusing on high performance and low compile time. Collaborate with hardware, compiler, and application teams to resolve issues and influence future GPU architectures.

The role involves designing and optimizing GPU architectures for AI Inference, analyzing hardware-software relationships, and developing performance models.

Develop compiler optimization algorithms for deep learning networks and AI inference platforms. Collaborate with software framework and GPU architecture teams to improve performance, build times, memory usage, APIs, and compiler techniques for current and future NVIDIA GPUs. Analyze performance, implement and test compiler technologies, support CPU/GPU workloads, and independently lead development efforts.

Design and optimize future GPU and processor memory systems for power, performance, area, and cost efficiency. Develop architecture and microarchitecture features, prototype models, and simulation workflows. Analyze benchmarks and performance or power results, debug issues across models, RTL, silicon, and systems, and collaborate with external partners. The role requires deep CPU/GPU architecture and memory systems expertise, power analysis experience, and proficiency in C, C++, and scripting languages.

The Senior Formal Verification Engineer will verify ASICs using formal verification methods, ensuring correctness and collaborating with architects and designers across projects.

Lead design and optimization of next-generation high-speed IOs (NVLink, NVLink-C2C), focusing on IO power management, power/performance modeling, interoperability, and deep debug across cross-functional teams to enable product bringup and release.

This role involves researching and optimizing applications for NVIDIA's computing platform, collaborating with customers and internal teams to enhance performance and design next-generation software and hardware.