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The role involves RTL synthesis, gate level optimization, and collaboration to meet timing and power requirements in ASIC design.

The Principal Developer Technology Engineer will optimize application workloads on NVIDIA architectures, collaborating with customers and teams for performance enhancement and design influence.

Responsible for designing and implementing inference software optimizations for NVIDIA's AI applications using C++, Python, and CUDA.

As a Senior ASIC Floorplan Design Engineer, you'll design and optimize floorplans for GPUs and SoCs, collaborate with teams to resolve design issues, and enhance tools for chip area optimization.

The role involves optimizing deep learning models using CUDA and C++, focusing on compiler technology and parallel programming for GPU architectures.

This role involves managing developer relations for a CSP, focusing on AI and GPU acceleration while building partnerships and ensuring successful application integration.

Design and implement OpenBMC Firmware for NVIDIA's GPU Server platforms, focusing on performance optimization, coding, and collaboration with hardware teams.

You will develop NVIDIA's cloud desktop platform, enhance performance, ensure quality code delivery, and contribute to architecture decisions.

Develop and optimize cloud-based streaming technology, focusing on networking protocols, security integration, and performance improvements in software systems.

The role involves developing machine learning solutions for autonomous vehicles, focusing on deep learning for prediction and planning, working collaboratively and researching innovative solutions.