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The Staff DevOps Engineer will optimize infrastructure for chip development, build CI/CD pipelines, and enhance workflows using AI/ML practices.

The CPU Core Unit Lead will develop next-generation CPU RTL, define microarchitecture specifications, oversee design quality, mentor junior engineers, and use AI tools to enhance design processes.

The CPU Workload Performance Analysis Engineer will conduct workload characterization and performance simulation to optimize CPU products, collaborating with architects and designers.

The Timing Engineer will perform static timing analysis, optimizing paths and constraints to ensure chip performance while collaborating with various engineering teams.