Top Remote Senior Level Hardware Engineer Jobs in Los Angeles, CA

The Senior Mechanical Engineer will design and develop consumer products, collaborate with teams, and lead mechanical engineers in creating and testing innovative technologies.

The Senior Mechanical Engineer will design mechanical systems for data centers, ensuring reliability, efficiency, and scalability while collaborating with various teams.

As a Manufacturing Engineer, you'll design and build tooling for assembly, optimize manufacturing processes, and support production qualification in a high-volume environment.

The Mechanical Engineering Director leads the U.S. Data Center Mechanical Department, providing oversight, technical direction, and mentorship for engineers. Responsibilities include managing design standards, supporting project delivery, and ensuring compliance with applicable codes and best practices.

The Senior Mechanical Engineer will design projects, oversee client interactions, manage project budgets, and ensure quality and compliance in engineering practices.

Lead the development of SoCs for satellites, manage physical design partners, ensure timing closure, and support design integration.

The engineer will define and implement ASIC package architecture, focusing on FC-BGA and MCM solutions, collaborating on package design and ensuring successful production of high-performance ASICs.

The role involves leading ASIC package design for FC-BGA and MCM solutions, ensuring high-performance mixed-signal/digital SoCs succeed from architecture to production. Responsibilities include trade studies, design standards, and vendor collaboration.

The Staff Product Engineer oversees new product transitions to high-volume production, ensuring cost-effective designs and process improvements in optical systems.

The Associate, Senior Mechanical Engineer will manage complex projects, maintain client relationships, and design HVAC systems, ensuring scope, schedule, and budget are met.

Lead design and implementation of digital IC/ASIC/SoC for medical imaging technology, owning RTL and validation processes with collaboration across teams.

Design and implement SystemVerilog RTL for high-speed ASIC compute, memory, and networking subsystems. Define microarchitecture, optimize Power/Performance/Area, collaborate with verification/physical teams, prototype features with architects/software, mentor junior engineers, and improve design flow using AI and automation.