Neros Technologies Logo

Neros Technologies

PCB Design Engineer

Posted 2 Months Ago
Be an Early Applicant
In-Office
Torrance, CA, USA
116K-162K Annually
Senior level
In-Office
Torrance, CA, USA
116K-162K Annually
Senior level
Own PCB layout from schematic release through fabrication for air and ground systems. Define stackups, placement, routing (high-speed, RF, power, flex/rigid-flex), manage Altium libraries and design standards, produce IPC-compliant fabrication/assembly packages, and coordinate with vendors for DFM/DFX and manufacturability.
The summary above was generated by AI

Who we are

Neros is a defense technology company rebuilding America’s drone industrial base. We design and manufacture high-performance unmanned systems that are tested in combat, iterated at startup speed, and built at massive scale. Our team culture is fast, hands-on, and obsessed with closing the gap between design and deployment.

As drones transform the character of warfare, Neros is delivering the systems the West needs to compete on the modern battlefield and deter the adversaries of democracy. We’re hiring engineers, operators, and builders who want to move fast, take on extreme ownership, and get capability into the hands of warfighters in months, not years.

What you will be doing

As a PCB Design Engineer at Neros, you will own printed circuit board layout across every product line we build, from the compact airside electronics inside our aircraft to the ground control hardware. You will take released schematics from our design engineers and own everything downstream: layer stackup, placement, controlled-impedance and RF routing, flex and rigid-flex interconnect, and the complete fabrication and assembly drawing package. You will also own our Altium library and the design standards the rest of the team works inside, which means the manufacturability and reliability of every board we ship starts with your work.

Responsibilities

  • Own PCB layout on assigned designs from released schematic through fabrication release, including board outline, layer stackup definition, component placement, routing, and design rule closure
  • Read and interpret schematics from the design engineers and apply the layout practices appropriate to each design
  • Own the Altium library: footprints, schematic symbols, land patterns, 3D component bodies, design rule and board templates, output jobs, naming conventions, and revision control
  • Implement high-speed digital, RF, precision analog, and power sections on the same board, applying controlled impedance, differential pair and length matching, and disciplined return path design
  • Design flexible and rigid-flex circuits, including bend area construction, stiffeners, coverlay, and ZIF terminations
  • Produce complete fabrication and assembly documentation to IPC Class 2 and Class 3, including fab and assembly drawings, Gerber X2 or ODB++, NC drill, netlists, paste and assembly data, and BOM outputs
  • Work directly with fabrication and assembly vendors on stackup and impedance confirmation, DFM and DFA feedback, and resolution of manufacturing issues
  • Establish and maintain the department's PCB design standards, review layouts produced by others, and coordinate external layout resources during design surges

You should have the following

  • 4+ years of dedicated printed circuit board layout and design experience on hardware that reached production
  • Expert proficiency with Altium Designer, including workspace and library management. Recent version experience preferred
  • Demonstrated personal ownership of a company or corporate CAD library: creating and maintaining footprints and symbols, deriving land patterns, and enforcing naming and revision standards across a design team
  • Boards and drawing packages designed to IPC standards, including IPC-2221 and IPC-2222 for design, IPC-6012 Class 2 and Class 3 for board qualification, IPC-A-610 and J-STD-001 for assembly acceptability, and IPC-7351 for land patterns
  • Flex and rigid-flex design experience, including bend area construction, stiffeners and coverlay, designed per IPC-2223 and qualified to IPC-6013
  • RF and high-speed digital layout expertise: transmission line theory and topology selection (microstrip, stripline, coplanar waveguide), controlled impedance, differential pairs, length and skew matching, reference plane and return path integrity, and via strategy
  • Experience defining layer stackups and closing impedance calculations directly with fabrication vendors
  • Fluency producing and releasing complete manufacturing output packages, with a track record of first-pass fabrication and assembly success
  • A degree in electronics or electrical engineering, or an equivalent depth of hands-on layout experience in place of a degree. We care about the boards you have shipped, not the credential
  • Ability to work onsite at our Torrance headquarters, and eligibility to work with export-controlled technical data as a U.S. person

Nice to Have

  • Altium 365 or Concord Pro workspace administration, managed components, and revision control of ECAD data
  • IPC CID or CID+ certification
  • ECAD to MCAD co-design with SOLIDWORKS or Creo, including STEP model exchange and enclosure fit checks before prototype
  • Signal and power integrity analysis exposure, such as HyperLynx, Ansys SIwave, or field solver based stackup and impedance tools
  • HDI construction, sequential lamination, microvias, via-in-pad, back-drilling, high layer count (greater than 16) and thicker board stackups
  • UAV, avionics, defense, medical, or other high-reliability applications where vibration, thermal extremes, and field reliability drive layout decisions
  • Scripting or automation of repetitive CAD and library tasks

US Salary Range

$136,500 – $191,500 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are considered part of Neros' total compensation package.

We’re an equal opportunity employer. We welcome all applicants without attention to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

HQ

Neros Technologies El Segundo, California, USA Office

El Segundo, CA, United States

Neros Technologies Los Angeles, California, USA Office

Los Angeles, United States

Similar Jobs

7 Days Ago
In-Office
116K-219K Annually
Junior
116K-219K Annually
Junior
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Leads signal integrity and PCB design activities, including stackup design, material selection, design guide implementation, post-layout analysis, and system-level simulation. Optimizes PCB power delivery networks and collaborates with package and PCB design teams on SI/PI performance. Performs TDR and VNA measurements for material characterization and model correlation. Requires expertise in high-speed interfaces, electromagnetics, transmission lines, PCB manufacturing, and industry-standard SI tools.
Top Skills: Cadence Allegro Pcb DesignerConstraints ManagerDdrElectromagneticsGddrHdmiHfssHspiceLpddrMipiPcb Stackup DesignPciePower Delivery NetworksSigrityTdrTransmission Line TheoryUsbVna
12 Days Ago
In-Office
137K-259K Annually
Senior level
137K-259K Annually
Senior level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Own complex board-level subsystems and products from hardware definition through qualification and manufacturing release. Design digital, analog, and mixed-signal circuits, high-speed routing, power-delivery solutions, and verification plans. Lead board bring-up, validation, signal and power integrity analysis, EMI/EMC and thermal risk resolution, design reviews, documentation, and product release. Collaborate with ASIC, software, mechanical, manufacturing, supplier, and other engineering teams while mentoring junior engineers.
Top Skills: AnsysAsicCadence AllegroCadence Concept/Design EntryDdr4Ddr5EthernetFpgaHyperlynxI2CKeysight AdsMdioOscilloscopesPciePol ConvertersProtocol AnalyzersSerdesSpiTdrsVnasVrm
15 Days Ago
In-Office
136K-179K Annually
Senior level
136K-179K Annually
Senior level
Hardware • Semiconductor • Quantum Computing • Manufacturing
Leads architecture, layout, and implementation of complex multilayer PCBs for semiconductor test and probe card applications. Drives high-speed, RF, mixed-signal, HBM, signal integrity, power integrity, manufacturability, and design execution from concept through release. Provides technical leadership and mentoring, improves design standards and automation, collaborates globally across engineering and manufacturing teams, and supports root-cause analysis and customer escalations.
Top Skills: Advanced PackagingAutomationBgaCadence AllegroControlled ImpedanceDfaDfmHbmHdiHigh-Speed DigitalMicroviasMixed-SignalPcb AssemblyPcb DesignPcb FabricationPcb LayoutPcbaPower IntegrityRfScriptingSiemens XpeditionSignal Integrity

What you need to know about the Los Angeles Tech Scene

Los Angeles is a global leader in entertainment, so it’s no surprise that many of the biggest players in streaming, digital media and game development call the city home. But the city boasts plenty of non-entertainment innovation as well, with tech companies spanning verticals like AI, fintech, e-commerce and biotech. With major universities like Caltech, UCLA, USC and the nearby UC Irvine, the city has a steady supply of top-flight tech and engineering talent — not counting the graduates flocking to Los Angeles from across the world to enjoy its beaches, culture and year-round temperate climate.

Key Facts About Los Angeles Tech

  • Number of Tech Workers: 375,800; 5.5% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Snap, Netflix, SpaceX, Disney, Google
  • Key Industries: Artificial intelligence, adtech, media, software, game development
  • Funding Landscape: $11.6 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Strong Ventures, Fifth Wall, Upfront Ventures, Mucker Capital, Kittyhawk Ventures
  • Research Centers and Universities: California Institute of Technology, UCLA, University of Southern California, UC Irvine, Pepperdine, California Institute for Immunology and Immunotherapy, Center for Quantum Science and Engineering

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account