ROIC Layout Lead

The ROIC layout lead is responsible for the physical design and integration of large scale ASIC, ROIC, and IP blocks through shuttle runs and concept prototype designs. This role is the key foundry interface and develops and executes the necessary activities to tapeout with the foundry. They are the interface with the chip lead, working hand in hand to architect the physical floor plan, and layout the constituent circuit blocks. This role coordinates additional layout resources when required, ensures chip level design methodologies and rules are implemented to streamline integration. The role is also relied on to perform custom layout of devices and circuit blocks with unique constraints such as pitch, yield, radiation hardness, and low noise.  

 

At least 10 years as IC Layout engineer working with mixed signal ASICs or large-scale IC blocks.

Good communication skills, working effectively with circuit designers to iterate optimal design requirements.

Strong proficiency in CAD tools: Cadence Virtuoso, Calibre DRC/LVS/LPE, Assura. Knowledge of digital top and analog top design workflows.

Understanding of deep sub-micron layout designs practices such as metal density rules, transistor and capacitor matching, as well as mixed signal and yield improvement strategies.

Ability to troubleshoot and resolve LVS/DRC errors, including ability to spot schematic errors such as mislabeled or connected power/ground nets.

Strong background in performing full custom analog IC layout.

Familiarity with semiconductor IC technologies (e.g., SiGe BiCMOS, deep sub-micron CMOS (FinFET and FDSOI), and III-V technologies (GaN, InP, etc.) is desired.

Familiarity with Parasitic extraction and or transistor modelling workflows is desired.

Proficiency with developing Innovus digital top workflows in multiple and large analog macro elements is desired.

Capable of customizing/generating standard cells for automated digital design flows is desired

Experience with manipulating tool input and output formats with the ability to script and systematically apply modifications to workflows is desired.

Experience with Linux workstation environment is desired

 

Proficiency in use of computers, engineering workstations, complex electronic equipment, oral and written communication, interaction with vendors/colleagues, and willingness to work in a fast-paced, deadline-driven environment. 

Ability to work well in a team and independently

 

U.S. citizenship is required.

Must be able to obtain and maintain a security clearance.

Active SSBI is a plus.

The base salary range for this full-time position is $145,745 - $186,688 + bonus + benefits.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range during the hiring process. Please note that the compensation details listed reflect the base salary only, and do not include potential bonus or benefits.