Process Development Engineer

Location: ​Alhambra, CA​ (Onsite)

Position Summary: The Process Development Engineer – InP Wafer Fab position is responsible for development, optimization, and manufacturing support of deposition and etch process modules used in the fabrication of Indium Phosphide (InP)–based photonic devices, including DFB lasers, Semiconductor Optical Amplifiers (SOAs), and Gain Chip (GC) products.  This role provides technical ownership of PECVD deposition processes and dry/wet etch technologies, serving as the primary process expert for dielectric films and plasma etch systems within the wafer fabrication facility. The position focuses on profile control, uniformity, yield improvement, manufacturing stability, and tool performance to enable robust and scalable production. 

Responsibilities:  

Deposition and Etch Process Development & Ownership (35%): 

• Develop, qualify, and maintain PECVD dielectric deposition processes for InP-based device structures 

• Develop and optimize dry etch (ICP-RIE/RIE) and wet etch processes for InP and related material systems 

• Own PECVD and ICP-RIE/RIE tools, including recipe control, chamber conditioning, and process stability 

• Define and maintain process windows, control limits, and equipment qualification requirements 

Tool Ownership, Control, and Manufacturing Stability (25%) : 

• Coordinate preventive maintenance and tool performance monitoring 

• Drive process uniformity, film thickness control, etch profile control, and critical dimension (CD) performance 

• Monitor tool health and respond to excursions impacting yield or reliability 

• Support capacity scaling, equipment qualifications, and tool transfers 

Failure Analysis and Root-Cause Resolution (20%): 

• Lead and coordinate failure analysis (FA) activities using structured problem-solving methodologies (e.g., 8D, Six Sigma) 

• Identify defect mechanisms and process-induced failure modes through cross-functional investigation 

• Leverage FA techniques such as optical inspection, SEM, FIB, SIMS, and electrical analysis (directly or via partners) 

• Ensure corrective and preventive actions are implemented and verified for effectiveness 

Yield Improvement, Excursion Response, and Root-Cause Analysis (20%): 

• Lead defect reduction and yield improvement initiatives related to deposition and etch processes 

• Perform structured root-cause investigations using data analysis, DOE, and failure analysis inputs 

• Analyze inline and electrical test data to identify trends, drifts, and emerging risks 

• Implement corrective and preventive actions and verify long-term effectiveness 

New Product Introduction and Technology Support (10%): 

• Support new product introduction (NPI), process transfers, and technology scaling efforts 

• Evaluate process risks associated with new materials, designs, and device structures 

• Interface with photo, metallization, device, and manufacturing teams to resolve integration issues 

Documentation, Process Control, and Manufacturing Support (10%) 

• Author and maintain SOPs, process specifications, travelers, and control plans 

• Define and maintain SPC metrics and control strategies for deposition and etch processes 

• Provide hands-on manufacturing and on-call support as required 

Minimum Qualifications: 

• Bachelor’s degree or higher in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or a related field 

• Minimum of 3+ years of experience in semiconductor deposition and/or etch process engineering 

• Hands-on experience with PECVD systems and ICP-RIE/RIE etch tools 

• Strong hands-on understanding of InP-based or III-V compound semiconductor wafer fabrication processes 

• Strong understanding of plasma processes, etch chemistries, and thin-film properties 

• Demonstrated experience with profile control, uniformity improvement, and SPC 

• Strong data analysis and problem-solving skills 

• Ability to drive technical ownership in a manufacturing environment 

• Preferred experience with InP or III-V compound semiconductor devices 

• Familiarity with DFB lasers, SOAs, gain chips, or photonic device manufacturing preferred 

• Experience supporting high-mix, low-volume manufacturing environments preferred 

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description. 

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities. 

A reasonable estimate of the pay range for this position is $73,000 - $110,000.  There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.