Northrop Grumman
Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA (Level 3/4)
Northrop Grumman’s Space Sector is seeking a Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA to join our team in Manhattan Beach, CA.
The Ground Systems Development Department is seeking a Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA to join our team in the development and integration of complex electronic test systems and electronic hardware units in support of space flight programs. This individual would act as a responsible design engineer (RDE) supporting digital development on our program.
The RDE responsibilities include FPGA and PCB: architecture design, detailed design, performing customer briefings/reviews, and hardware test. Primary deliverables are flight electronics test systems and satellite system operational ground-based hardware.
The candidate will perform designs in a team environment with other engineering functions, including Ground Hardware Engineering, Flight Hardware Engineering, Systems Engineering, Product Engineering, Software Engineering, Production, Procurement, and Program Management to meet schedule and technical requirements.
The ideal candidate has a broad range of experience with:
Design, integration, and test of Digital circuits
FPGA development
PCBs/CCA design
Electronic drawer/unit design
Small to large electronic subsystems
Some responsibilities include performing the following:
Detailed Digital analysis at the component level
FPGA design, functional simulation, and test vector creation
PCB/CCA design, development, test, and integration
Electronic Unit design, development, test, and integration
Electronic Test System (Test Set) design, development, test, and post-delivery support
Worst case performance analysis for critical Digital signals
Developing and presenting design reviews for internal and external customers
As a full-time employee of Northrop Grumman Space Systems, you are eligible for our robust benefits package including:
Medical, Dental & Vision coverage
401k
Educational Assistance
Life Insurance
Employee Assistance Programs & Work/Life Solutions
Paid Time Off
Health & Wellness Resources
Employee Discounts
This position’s standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off.
**This position can be filled at level 3 or 4.**
Basic Qualifications (Level 3):
Bachelor's Degree in a STEM discipline plus 5 years of engineering experience OR Master’s Degree in a STEM discipline plus 3 years of engineering experience OR 0 years of engineering experience with a STEM PhD.
Requires an active Sensitive Compartmented Information (SCI) clearance at time of application
Basic Qualifications (Level 4):
Bachelor's Degree in a STEM discipline plus 8 years of engineering experience OR Master’s Degree in a STEM discipline plus 6 years of engineering experience OR 4 years of engineering experience with a STEM PhD.
Design and test experience in electronics or digital technology
Previous FPGA design experience
Requires an active Sensitive Compartmented Information (SCI) clearance at time of application
Preferred Qualifications:
Design and test experience in Analog/RF and Digital technology
Master’s degree in Electrical or Computer Engineering from an accredited institution
Excellent written and verbal communication skills
Active Top Secret & SCI clearance
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