Develop and verify FPGA designs from test planning through tape-out. Create SystemVerilog and UVM testbenches, C-based tests, UVCs, and hardware/software integration tests. Develop test plans, measure functional coverage, and drive coverage closure. Preferred experience includes SpaceWire, DDR4 memory interfaces, SerDes connectivity, and configuration, control, and telemetry systems.
Key Skills:
FPGA Design Verification
SystemVerilog and UVM testbench development
C test development and hardware/software integration
Test plan development, functional coverage, and coverage closure
Universal Verification Component (UVC) development
FPGA verification from test planning through tape-out
Preferred Skills:
SpaceWire Protocol
DDR4 Memory Interfaces
SerDes Connectivity
Configuration, Control, and Telemetry Systems
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