ASIC & FPGA Design Engineer Sr Stf - E5

Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions.

IN THIS ROLE, YOU WILL:

Work with low SWaP, radiation hardened, space rated devices.

Devise a unique verification plan for a given design.

Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.

Develop requirements, test cases, build test benches, generate reports, and document verification results.

Work with an independent design team to document and resolve bugs found in the design.

Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.

Support technical reviews, and be able to present to internal and external stakeholders.

The information below reflects the standard job description for this position:

Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.

• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
• Experience in the verification of FPGA and/or ASIC devices.
• HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
• Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.

• Masters or PhD highly preferred.
• Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
• FPGA/ASIC design experience is a plus.
• Experienced in scripting such as Perl, TCL, Python.
• Experience developing test cases based off given requirements.
• Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
• Experience identifying and implementing necessary test exclusions.
• Experience generating coverage reports (code and functional)
• Experience or knowledge of MS Project, JIRA.
• Experience leading projects of multiple engineers, managing schedules. prioritizing work and actively communicating with internal or external stakeholders.
• Knowledge of space-grade/qualified FPGAs and ASICs.
• Experience with Earned Value Management System (EVMS).
• Experience mentoring junior engineers.
• Proficient in AI prompting as it applies to this position and practice.