Teams at Tenstorrent Inc.

Design and implement chip-level DFT strategies for high-speed CPU cores and multi-chiplet SiP. Implement and verify scan chains, memory BIST, and JTAG. Partner with RTL, physical design, and verification teams. Script and automate DFT flows using EDA tools (ATPG, fault coverage) and support SoC-level silicon debug, formal verification, and DFT signoff.

Contract recruiter responsible for full-cycle hiring for supply chain, procurement, manufacturing operations, logistics, supplier quality, planning, and business operations. Build talent pipelines beyond LinkedIn, partner with hiring managers to scope roles and move searches, assess and close candidates, and maintain process-oriented, scalable recruiting workflows. 6-month contract, remote with location preferences.

Design and deliver die-to-die chiplet PHY IP in advanced FinFET nodes: develop PLLs and AMS blocks, lead design verification and layout interactions, support tape-out and silicon bring-up, and collaborate across architecture, digital, verification, layout, and software teams to achieve production-quality silicon.