Teams at Astera Labs

Design and architect high-speed analog and mixed-signal circuits for SerDes, PHY, clocking, and high-speed I/O products. Lead designs from specification through schematic, layout supervision, verification, silicon bring-up, characterization, and debug. Establish design methodologies, collaborate across engineering teams, and mentor analog engineers. The role requires advanced CMOS/FinFET design expertise, physical-layer and signal-integrity knowledge, and proficiency with industry-standard simulation tools.