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Claros (claros.tech)

Power Management Integrated Circuit (PMIC) Controls Engineer

Reposted 4 Days Ago
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In-Office
Torrance, CA, USA
155K-230K Annually
Senior level
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In-Office
Torrance, CA, USA
155K-230K Annually
Senior level
Design and develop high-performance analog circuits for PMICs, lead design methodologies, collaborate with multi-disciplinary teams, and ensure compliance with specifications.
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Claros is a power management solutions company that is innovating at the intersection of power and compute to make AI more sustainable and widely available. By driving down the cost and complexity of power delivery and leveraging innovative hardware and software, the company seeks to decrease energy consumption, optimize power delivery, increase compute performance, and maximize the efficiency of AI operations.

Power Management Integrated Circuit (PMIC) Controls Engineer

 

About Claros 

Claros innovates at the intersection of power and compute. We build advanced semiconductor power management solutions that improve AI compute capacity, efficiency and reliability. Claros is an early-stage startup company located in Torrance, CA. If you are looking for challenging work and a strong technical environment with the collaborative & supportive culture, then Claros Tech is the company for you. We offer industry the best competitive pay & benefits and early-stage stock options. 

Location: Minimum of 3 days a week in the office in Torrance, CA.  

About the Team: 

We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking.  Our response is never “no, but….” instead “yes, if….”.  We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best. 

About The Role

Claros Inc. is seeking to hire an exceptional  Power Management Integrated Circuit (PMIC) Controls Engineer to join our ASIC team in Torrance, CA. Candidate must be self-motivated individual to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering PMICs (Low-dropout (LDO) linear voltage regulators, Switching regulators, DC-DC Buck Converters), ADC/DAC, PLL, Gate Drivers, and PMIC chip integration). As a Senior level  role you'll play a crucial role in system level strategies of Power management ICs from concepts into release to production, collaborating closely with other circuit designers, and leveraging sophisticated tools.  

What You Will Do

In this role, you will be responsible for developing the algorithms for power sequencing, voltage scaling and implementing control loops for stability for PMICs used in a range of applications. 

  • Collaborate with other engineers to define and implement design methodologies and best practices for PMIC design and related areas. 
  • Work with multi-disciplinary teams including control, systems, testing to implement new ideas and in writing the specifications, design, characterization, verification and documentation.  
  • Summarize and interpret results of highly complex performance checks and review it with team. 
  • Use problem solving skills, experience, and supervise the layout circuit designers. Guide them with floor planning and in resolving DRC/LVS errors.  
  • Behavior and transistor level circuit design, simulation and verification of power management blocks including LDO, Switch Mode Power Supplies (buck, boost), voltage reference and other analog circuits meeting power, performance and area specifications. 
  • Work closely with PCB layout engineers to ensure performance and quality of the designs.  
  • Work with team on best packaging approach for design and test.  
  • Datasheet drafting and reviews. 
  • Work with product managers to develop the next generation of products. 

What You Bring

  • Bachelor’s degree in electrical engineering with 3+ years of overall experience in analog/mixed signal IC Design. 
  • Knowledge of semiconductor manufacturing processes and their impact on analog circuit design. Experience in designing circuits in High voltage (BCD) technology processes and FinFET technology (like 12nm and below) is preferred. 
  • Strong background in Power Management and circuit design principles, Buck or switching cap based topology, power converter control theory (voltage mode/current mode, PWM/PFM), Mixed Signal Design, Gate Drivers, PLL & Clock Chip Design. 
  • Must have released at least one full IC design from Concept to release to production. 
  • Good knowledge in device physics and device reliability analysis. 
  • Proficiency in using Cadence IC Design Tools. 
  • Familiarity with industry standard interface protocols such as SPI, I2C, PMBus/SMBus. 
  • Ability to document design techniques, test and verification methodology. 
  • Conduct design reviews, analyze and debug circuits, and perform system-level testing to validate performance and ensure compliance with specifications. 
  • Full chip integration and Top-Level Simulations. 
  • Strong analytical and problem-solving skills, with the ability to debug complex issues. 
  • Excellent communication and collaboration skills to work effectively in a team environment. 
  • Ability to effectively prioritize and execute tasks in a high-pressure environment. 

What Is Helpful

  • Master’s degree or higher.
  • Digital control theory
  • Experience using Matlab/simulink
  • Knowledge in writing Verilog/VHDL modeling. 
  • Experience with layout design, layout review, and layout versus schematic (LVS) verification. 

What We Offer

  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows.   
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.  
  • Paid maternity and paternity for 14 weeks at employees' normal pay.  
  • Unlimited PTO, with management approval.  
  • Opportunities for professional development and continued learning.  
  • Optional 401K, FSA, and equity incentives available. 

Salary Range:  $180,000-$220,000. This represents the typical salary range for this position based on experience, skills, and other factors.



Our Red Cell Partners Benefits: 

  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows  
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family. 
  • Paid maternity and paternity for 14 weeks at employees' normal pay. 
  • Unlimited PTO, with management approval. 
  • Opportunities for professional development and continued learning. 
  • Optional 401K, FSA, and equity incentives available. 

Applicant Data Disclosure   

By submitting an application, you acknowledge that Red Cell Partners, LLC ("Red Cell") uses third-party service providers to facilitate its recruitment and hiring processes. These providers include applicant tracking systems, candidate verification platforms, and fraud detection tools (collectively, "Hiring Platforms"). Your application materials, including your résumé, cover letter, work samples, responses to application questions, and any other information you submit, may be transmitted to and processed by these Hiring Platforms for the following purposes:  

  • Managing and administering your application throughout the hiring process; 
  • Verifying the accuracy and authenticity of application materials, including by cross-referencing information you provide against publicly available sources and proprietary databases; 
  • Identifying indicators of potentially fraudulent, fabricated, or materially misleading application content, including but not limited to discrepancies between submitted materials and publicly available professional profiles, geographic anomalies, and fabricated work histories. 

Applications that are flagged through this process as containing indicators of fraud or material misrepresentation may be declined from further consideration. If you have questions about the status of your application or the evaluation process, please contact talent@redcellpartners.com 

Red Cell requires its Hiring Platform providers to process your information solely for the purposes described above and in accordance with applicable law. Your information will be retained only for as long as necessary to fulfill these purposes and any applicable legal obligations, after which it will be deleted in accordance with Red Cell's data retention policies.

For more information about how your data is used, please refer to our Privacy Policy and Applicant Privacy Notice.  

 

Top Skills

Cadence Ic Design Tools
Matlab
Perl
Python
Verilog
Vhdl
HQ

Claros (claros.tech) Torrance, California, USA Office

21515 Hawthorne Blvd, Suite 650, Torrance, CA , United States, 90503

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