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Axiado

Senior FPGA Design Engineer

Posted 12 Days Ago
Be an Early Applicant
In-Office
San Jose, CA
5-5
Senior level
In-Office
San Jose, CA
5-5
Senior level
Design and validate FPGA systems, perform RTL design, conduct simulation testing, and collaborate with other teams on system integration and debugging.
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Company Description

Axiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 150+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile to achieve exceptional results. It takes people who have the passion and desire to disrupt the status quo, deliver innovation, and change the world. If you have this type of passion, we invite you to apply for this job.

Job Description

Senior FPGA Design Engineer position is your opportunity to join one of the industry’s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado, you will have the opportunity to work in design, verification, debug and system integration. You will work closely with the Architecture, Verification, ASIC Design and Software teams, and report into the Engineering organization. 

Key Responsibilities

  • RTL design for FPGA, including IP integration, closing timing and generating bit streams

  • Simulation testing

  • FPGA system setup

  • FPGA system validation and debug

  • Work with SW team to bringup and validate FPGA system product

Qualifications

  • Product experience with FPGAs and related tools such as compile and timing closure

  • Strong experience in RTL design, especially design for FPGAs

  • Integration of IPs and CPUs for FPGA

  • Experience in RTL simulation testing

  • Experience in bringing up and debugging SW on FPGA systems

  • Familiarity with PCIe, USB, Ethernet, SPI. The following are pluses: ESPI, SGPIO, LTPI

  • Self driven, good problem solving and communication skills

  • BS or MS (preferred) degree in EE/EECS/CS or equivalent. 

  • At least 5 years of industrial experience

Additional Information

Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.

We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.

Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.

Top Skills

Ethernet
Fpga
Pcie
Rtl
Spi
Usb

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