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Broadcom

R&D Engineer IC Design

Posted 25 Days Ago
Be an Early Applicant
In-Office
San Jose, CA
141K-225K Annually
Senior level
In-Office
San Jose, CA
141K-225K Annually
Senior level
Design cutting-edge CoWoS interposer solutions; engage in routing, physical verification, and collaborate with cross-functional teams to meet design requirements.
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Job Description:

We are part of the core switching group (CSG) at Broadcom developing industry leading network switches for enterprise and mega scale data centers . We are looking for experienced engineers to design cutting edge CoWos 2.5D , 3D interposer designs.   You will be working on designing interposers starting with custom routing for high speed interfaces, bump map design ,  routing and physical verification and tapeout to the foundries.  As part of your job you will be interacting with packaging , signal integrity and foundries to meet the packaging, SI and physical requirements of the interposers. Experience with interposer designs including CoWoS, 2.5D/3D integration using Cadence Innovus/Integrity or Synopsys 3DIC compiler is a must. Candidates should have a strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies. Strong automation expertise related to bump pattern generation , routing structure development for high speed interfaces, and chip finishing are required to handle multiple Interposer designs in parallel. Basic understanding of routing structure impact on high-speed signal integrity (SI), power integrity (PI), and thermal analysis is required.
 

Technical Skills & Experience:

  • Experience with interposer and advanced packaging design, including CoWoS, 2.5D/3D

  • Proficiency with EDA tools such as Cadence (Innovus, Integrity), Synopsys (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification

  • Strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies.

  • Basic understanding of high-speed signal integrity (SI), power integrity (PI), and thermal analysis.

  • Familiarity with semiconductor fabrication processes, particularly for silicon interposers.

  • Strong scripting skills (Python, Tcl, SKILL) for automation and flow customization.

  • Ability to work with cross-functional teams including IC design engineers, packaging egineers, and foundries

Additional Skills:

  • Strong problem-solving skills and attention to detail.

  • Excellent communication and teamwork skills.

  • Ability to document design processes, specifications, and reviews.

  • Familiarity with 3DBlox interposer modelling language is a plus

Preferred Qualifications:

  • Hands-on experience with high-density interposers in complex packaging environments.

  • Strong scripting skills to automate the interposer design flow

  • Previous experience at semiconductor or advanced packaging companies.

Educational Background:

  • Bachelor’s in Electrical Engineering, Microelectronics, or related fields and 12+ years of related experience, or a Master’s degree and 10+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000 - $225,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Cadence Innovus
Cadence Integrity
Mentor Graphics Calibre
Python
Skill
Synopsys 3Dic Compiler
Tcl

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