Elevate Semiconductor Logo

Elevate Semiconductor

Principal Analog Design Engineer

Posted 19 Days Ago
Be an Early Applicant
In-Office
San Diego, CA
175K-240K Annually
Expert/Leader
In-Office
San Diego, CA
175K-240K Annually
Expert/Leader
Lead architecture and hands-on design of advanced ATE instrumentation including high-voltage analog, precision references, DACs, ADCs, and high-speed pin electronics. Own concept through tapeout, validation, and production; develop behavioral models (Octave/Verilog-A); collaborate with layout, VLSI, packaging, and test teams; mentor designers and influence methodology and cross-functional execution.
The summary above was generated by AI

At Elevate Semiconductor, we empower semiconductor and system test customers by creating world class ICs that tackle the industry’s most complex automated test equipment challenges. Our innovative team designs the lowest power, highest density solutions to reduce cost of test while pushing performance forward.

As a Principal Engineer in Analog Design at Elevate Semiconductor, you will operate at the highest level of technical leadership while remaining deeply hands-on in architecture and circuit design. This role is built for engineers who don’t just guide innovation, they actively drive it from concept through silicon and into production.

You will lead the definition and execution of next-generation ATE instrumentation solutions, with a strong focus on high-voltage analog, precision design, and digitally assisted architecture. Working across design, layout, and production test, you will take ownership of complex systems that push the limits of performance in noise, linearity, power, and area.

This is a highly visible role where your technical judgment, execution speed, and ability to influence across domains will directly shape product success and company direction.

This is a full-time, onsite position based in San Diego, CA.

Responsibilities

  • Lead architecture, design, and hands-on development of advanced ATE instrumentation circuits, including high-voltage analog and precision references and high speed pin electronics.
  • Drive end-to-end ownership from concept, modeling, and design through tapeout, validation, and production release\Architect innovative solutions balancing noise, linearity, power consumption, and silicon area for high-performance applications
  • Design and guide development of key building blocks such as DACs, High current output drivers, high speed Tx and Rx, instrumentation amplifiers.
  • Champion digitally assisted analog techniques to enhance performance, scalability, and robustness
  • Develop and validate behavioral and system models using Octave and Verilog-A
  • Collaborate closely with layout, digital/VLSI, packaging, and test engineering teams to ensure first-pass silicon success
  • Mentor and elevate senior and junior designers through technical leadership and design reviews
  • Influence design methodology, tools, and best practices to improve efficiency, reuse, and product quality
  • Partner cross-functionally with product and operations teams to ensure designs meet real-world production and customer requirements
  • Act as a technical anchor across multiple projects, driving alignment and execution in a fast-paced environment

Requirements
  • Master’s degree or PhD in Electrical Engineering or related field
  • 20+ MSEE/ 15+ PhD years of experience in Analog/Mixed-Signal IC design with a strong track record of successful silicon
  • Deep expertise in high-voltage analog architectures and precision CMOS design techniques
  • Proven experience designing complex mixed-signal systems including ADCs, DACs, PLLs/DLLs, regulators, amplifiers, and interface circuits
  • Proven track record of leading complex analog ASICs from architecture definition to full analog verification
  • Experience leading a team of senior analog designers
  • Strong background in digitally assisted analog design methodologies
  • Expertise in system and behavioral modeling using MATLAB, Simulink, and/or Verilog-A
  • Demonstrated ability to architect solutions that meet aggressive performance targets across noise, linearity, power, and area
  • Solid understanding of AMS design flows, chip integration, and assembly considerations
  • Experience working cross-functionally with layout, digital, and production test teams
  • Exceptional problem-solving skills with the ability to navigate complex, multi-variable design challenges
  • Strong communication skills with the ability to influence across engineering disciplines and organizational levels

Benefits
  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

The salary range for this role is $175,000.00-$240,000.00. Starting salary will be aligned with your relevant experience and demonstrated capabilities during the interview process. Typically, candidates begin at the initial tier of our compensation range, with placement adjusted for candidates presenting extensive directly applicable experience.

Elevate Semiconductor Los Angeles, California, USA Office

Los Angeles, United States

Similar Jobs

12 Days Ago
In-Office
207K-230K Annually
Senior level
207K-230K Annually
Senior level
Big Data • Information Technology
Design and architect high-speed analog and mixed-signal circuits (PLLs, LDOs, SerDes, ADC/DAC, references) in advanced FinFET nodes. Lead silicon bring-up, characterization, and validation; define test plans; set analog methodology and best practices; collaborate cross-functionally and mentor junior engineers through full-chip delivery.
Top Skills: AdcsAteCadence VirtuosoDacsEthernetFinfetLdosPciePllsSerdesSpectreUalinkUcie
4 Days Ago
In-Office
143K-304K Annually
Senior level
143K-304K Annually
Senior level
Software • Quantum Computing • Metaverse • Infrastructure as a Service (IaaS)
Hands-on principal engineer driving physical implementation, timing closure, and physical verification for analog and mixed-signal IP. Owns Fusion Compiler APR flows, floorplanning, placement, routing, ECOs, timing debug, and signoff readiness while coordinating cross-functional teams and mentoring engineers.
Top Skills: Fusion CompilerPrimetimeVirtuoso
20 Days Ago
In-Office
Woodland Hills, Los Angeles, CA, USA
114K-171K Annually
Senior level
114K-171K Annually
Senior level
Aerospace • Logistics • Security • Software • Cybersecurity
Design and analyze analog circuits from system requirements through detailed design, verification, and characterization. Perform circuit modeling, simulation, PCB signal and power integrity analysis, schematic capture, subsystem testing, and troubleshooting. Collaborate within model-based engineering, DevSecOps, and Agile practices for defense systems.
Top Skills: AgileAltium DesignerAmsCadenceDevsecopsHyperlynxMentor XpeditionModel-Based EngineeringPcb DesignPower IntegrityPspiceSignal Integrity

What you need to know about the Los Angeles Tech Scene

Los Angeles is a global leader in entertainment, so it’s no surprise that many of the biggest players in streaming, digital media and game development call the city home. But the city boasts plenty of non-entertainment innovation as well, with tech companies spanning verticals like AI, fintech, e-commerce and biotech. With major universities like Caltech, UCLA, USC and the nearby UC Irvine, the city has a steady supply of top-flight tech and engineering talent — not counting the graduates flocking to Los Angeles from across the world to enjoy its beaches, culture and year-round temperate climate.

Key Facts About Los Angeles Tech

  • Number of Tech Workers: 375,800; 5.5% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Snap, Netflix, SpaceX, Disney, Google
  • Key Industries: Artificial intelligence, adtech, media, software, game development
  • Funding Landscape: $11.6 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Strong Ventures, Fifth Wall, Upfront Ventures, Mucker Capital, Kittyhawk Ventures
  • Research Centers and Universities: California Institute of Technology, UCLA, University of Southern California, UC Irvine, Pepperdine, California Institute for Immunology and Immunotherapy, Center for Quantum Science and Engineering

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account