Job Details:
Job Description:
Team Introduction:
We are a Physical Design execution team in the Client Graphics and AI organization responsible for design implementation, verification and tape-out of next generation, industry-leading Graphics/AI products for Intel. We cover all aspects of planning, implementation, optimization and verification at all design hierarchies and end to end from RTL to final product tape-out.
Responsibilities:
In this position, candidate will be part of a team implementing Integrated and Discrete Graphics blocks on leading edge process technology and EDA tools. The team is responsible for all SoC level physical design and optimization flows ranging from Floorplanning, Synthesis through GDS and parallel verification aspects such as Static Timing Analysis, Formal Verification, EM/IR/PDN aspects, Layout Verification etc. The ideal candidate will be responsible for development/ implementation and execution of a range of flows on a given design block for Intel graphics projects. The responsibilities may also include defining product requirements such as frequency, operating voltages, etc., coming up with new methodologies/ implementing them and validating them to tackle new challenges presented by the new technologies/ processes/ architectures. The candidate would be required to work closely with the rest of the project team members to resolve issues which arise during the design cycle and take the key learnings into the next product cycle. Good interpersonal/communication skills are necessary due to the nature of work, size/complexity of products and the size of the team.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
Minimum Qualifications:
Education Requirements:
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Bachelor’s in Electrical/Computer Engineering or related field with 4+ years relevant work experience OR
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Master's in Electrical/Computer Engineering or related field with 3+ years relevant work experience
Relevant coursework/experience:
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Logic Design/VLSI/ASIC Design/Architecture
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General Knowledge in one or more of ASIC style design flows - floorplanning, synthesis, place/ route, layout verification, static timing analysis
Preferred Qualifications:
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Preferred knowledge of SoC integration aspects such as floorplan/ timing integration of a variety of RLS blocks
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Hands-on experience with any of the industry tools in these areas will be an added plus
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Knowledge and Experience with Unix/ Linux, Perl and TCL in order to implement useable, flexible cshell/ perl/ tcl programs that automate tool/flow methodologies
Job Type:Experienced Hire
Shift:Shift 1 (United States of America)
Primary Location: US, California, Folsom
Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro
Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.
Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range for jobs which could be performed in the US:
$139,710.00-$197,230.00
Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Intel Irvine, California, USA Office
111 Theory, Irvine, CA, United States, 92617
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